1. Field of the Invention
The present invention relates generally to microelectronic packaging and, more particularly, to a method and apparatus for improving laminate performance in a ball grid array (BGA) package.
2. Description of the Related Art
This section is intended to introduce the reader to various aspects of art which may be related to various aspects of the present invention which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
The packaging of electrical circuits is a key element in the technological development of any device containing electrical components. Several technologies have been developed to provide a means of mounting these electrical components on a surface of a substrate, such as a printed circuit board (PCB). Fine pitch surface mount (FPT), pin grid array (PGA), and ball grid array (BGA) are examples of leading surface mount technologies.
BGA technology offers several advantages over FPT and PGA. Among the most often cited advantages of BGA are: reduced co-planarity problems, since there are no leads; reduced placement problems; reduced paste printing problems; reduced handling damage; smaller size; better electrical and thermal performance; better package yield; better board assembly yield; higher interconnect density; multi-layer interconnect options; higher IO's for a given footprint; easier extension to multi-chip modules; and faster design-to-production cycle time. A BGA integrated circuit (I/C) package generally includes an I/C chip, such as a memory device, mounted on the top surface of a substrate. The I/C chip may be electrically coupled to the substrate by bond wires.
Regardless of the type of surface mount technology chosen, three common mounting techniques used to attach the I/C chip to the substrate include chip-on-board (COB), board-on-chip (BOC), and flip-chip (F/C). For COB packages, the I/C chip may be attached to the substrate “face-up”. That is to say that the side of I/C chip containing the bond pads for wire bonding the chip to the substrate is left exposed on the top surface. The backside of the I/C chip, which does not contain the bond pads, is adhered to the substrate. In this type of package, bond wires are attached to the exposed surface of the chip down to pads on the top surface of the substrate. The substrate contains electrical traces which route the signals from the top side of the substrate to external connections.
Alternately, the integrated circuit die may be mounted on the substrate “face-down,” as in a BOC package. In this instance, the substrate typically contains a slot. Since the I/C chip is mounted face-down, the bond pads on the surface of the chip are arranged to correlate with the slot opening in the substrate. Bond wires are attached from the bond pads on the chip, through the slot on the substrate, and to the backside of the substrate. The substrate contains electrical routing to distribute electrical signals along the backside of the substrate.
For F/C packages, the integrated circuit die is mounted on the substrate face-down as in the BOC package. However, in a F/C package bond wires are not used to electrically couple the I/C chip to the substrate. Instead, solder bumps located on the face of the chip are aligned with conductive pads on the mounting side of the substrate. The solder bumps may be re-flowed to electrically couple the chip to the substrate. The substrate contains electrical routing to distribute the electrical signals from the die along the backside of the substrate.
Regardless of the mounting techniques used to attach an I/C chip to a substrate, BGA substrates contain conductive routing which allows the signals to pass from the I/C chip to landpads on the backside of the substrate. A plurality of solder balls are deposited and electrically coupled to the landpads on the backside of the substrate to be used as input/output terminals for electrically connecting the substrate to a PCB or other external device.
The substrate is generally a laminate made up of many layers of thin material. Because the substrate is comprised of several layers of material which have been bonded together, the integrity between layers of material may provide a failure mechanism in the I/C package. Solder ball-to-landpad or landpad-to-substrate integrity, which may be critical to the functionality of the I/C package, are particularly susceptible to delamination due to mechanical stresses associated with handling and shipping of the I/C packages. This is especially true when the part is processed through electrical testing, since the packages are frequently being loaded and unloaded in and out of test sockets. Cratering, pad lifting, and ball shearing are typical failure modes which are associated with laminates.
The present invention may address one or more of the problems set forth above.